1. Technical Field
This disclosure relates to buffer tree synthesis. More specifically, this disclosure relates to look-up based buffer tree synthesis.
2. Related Art
Advances in semiconductor technology presently make it possible to integrate hundreds of millions of transistors onto a single semiconductor chip. This dramatic increase in semiconductor integration densities has made it considerably more challenging to design circuits.
Some circuit synthesis approaches use an ad hoc approach to synthesize buffer trees. Specifically, in these approaches, non-optimal buffer trees are constructed during synthesis for high fan-out nets. Then, during delay optimization, buffers or inverters are added to the buffer tree in an ad hoc fashion to satisfy timing constraints. Unfortunately, such ad hoc buffer tree synthesis approaches often produce poor quality results. Therefore, what are needed are systems and techniques for buffer tree synthesis that do not have the above-mentioned drawbacks.